The present invention relates, in general, to electronics and, more particularly, to methods of forming semiconductor devices and structure.
High power semiconductor components typically include circuitry to protect them from thermal failure. For example, an integrated voltage regulator that dissipates a large amount of heat often includes a thermal shutdown circuit that shuts down or turns off the integrated circuit when the temperature reaches a critical level. Once the substrate cools down, the thermal shutdown circuit turns the voltage regulator back on. A drawback with including thermal shutdown circuits is that they completely remove power from their load and cause the system to shut down.
Another common way to protect power Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) against thermal failure is to decrease the current conducted through them by coupling together a plurality of output devices in parallel. For example, a plurality of insulated gate field effect transistors can be configured to have their drain terminals coupled to each other, their gate terminals coupled to each other, and their source terminals coupled to each other. In this configuration, the output current is shared by several insulated gate field effect transistors such that the total output current is the sum of the currents flowing through each insulated gate field effect transistor. A drawback with this approach is that differences in their on-resistance (Rdson) may lead to an imbalance in the currents that flow through each insulated gate field effect transistor causing one or more of the field effect transistors to overheat and suffer thermal failure. Integrated circuit manufacturers have included active circuits that measure the current flowing in the parallel connected insulated gate field effect transistors to overcome this problem. In this configuration, the gate terminals are not connected to each other but are coupled to receive independent control signals. A control circuit uses the measured current to adjust the gate drive of the individual insulated gate field effect transistors to maintain substantially the same current in each insulated gate field effect transistor. Drawbacks with this approach include the need for complicated circuitry to monitor the current flowing through each insulated gate field effect transistor and the complexity of the interconnections to route the data to the control circuit.
Accordingly, it would be advantageous to have methods and circuits that lower the operating temperature of a transistor and that maintain current conduction through the transistor. It would be advantageous for the methods and circuits to be cost efficient.
For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference characters in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current flow through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with embodiments of the present invention. It will be appreciated by those skilled in the art that the words during, while, and when as used herein are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay, such as a propagation delay, between the reaction that is initiated by the initial action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be very close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to about ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are regarded as reasonable variances from the ideal goal of exactly as described.
It should be noted that a logic zero voltage level (VL) is also referred to as a logic low voltage and that the voltage level of a logic zero voltage is a function of the power supply voltage and the type of logic family. For example, in a Complementary Metal Oxide Semiconductor (CMOS) logic family a logic low voltage may be thirty percent of the power supply voltage level. In a five volt Translator-Translator Logic (TTL) system a logic low voltage level may be about 0.8 volts, whereas for a five volt CMOS system, the logic zero voltage level may be about 1.5 volts. A logic one voltage level (VH) is also referred to as a logic high voltage level and, like the logic zero voltage level, the logic high voltage level also may be a function of the power supply and the type of logic family. For example, in a CMOS system a logic one voltage may be about seventy percent of the power supply voltage level. In a five volt TTL system a logic one voltage may be about 2.4 volts, whereas for a five volt CMOS system, the logic one voltage may be about 3.5 volts.